Conventional semiconductor devices have been fabricated through the repeated application of photolithographic techniques in combination with external masks to establish various regions within a device. It is difficult to precisely align one external mask with another external mask and consequently, various device regions may become misaligned. To overcome these misalignment problems, semiconductor devices have been designed with regions which are larger than necessary to provide tolerance zones to accommodate mask misalignments so that even when successive masks are misaligned, a working device can still be fabricated. Misalignment tolerant fabrication techniques are wasteful of semiconductor device real estate and provide devices having an excessive range of performance characteristics. While self aligned techniques have been previously employed to establish various semiconductor devices, these techniques have not been employed to establish vertical channel semiconductor devices.